Aakanksha Devrari

Doctoral Research Fellow

 

B.Tech (Electronics & Communication Engineering), Uttaranchal Institute of Technology, Dehradun, Uttarakhand                           

M.Tech (Electronics & Communication (VLSI)),  Uttarakhand Technical University, Dehradun, Uttarakhand

 

Area of Specialization:

Electronics & Communication Engineering with SPZ in VLSI Design

 

Research & Publications:-

International Journals:

 

.Journal of Engineering and Applied Sciences (Scopus Index), Year: 2017 | Volume:12, Issue:12,SI|,PageNo.:9430-9435,“Design and Implementation of Memory- Based Pipelined FFT Architecture for Complex-Valued Signals”, DOI:  10.3923/jeasci.2017.9430.9435 , ISOI, National Symposium 39, March issue 2015, “Design and implementation of 32 point FFT processor using Memory Optimization Technique”.

 

International Journal of Scientific & Engg. Research,Volume 6, Issue 11, November 2015, ISSN 2229-5518,PP-1272-1277, “Implementation of Modular Exponentiation using Montgomery
algorithm”.

 

International Journal of Recent Technology and Engineering (Scopus Index), “Design and FPGA Implementation of LDPC Decoder for communication system using VHDL”, ISSN: 2277- 3878, Volume-8 Issue-2, July 2019, Pg. No. 200-206, DOI:10.35940/ijrte.A2203.078219 .

 International Conferences:

 

Advances in Intelligent Systems and Computing, Proceedings of International Conference on Intelligent Communication, Control and Devices, “Design and FPGA Implementation of DSSS for Near Far Effect in MANET”, Paper ID-80, Springer conference Ref . No. 45700,
vol. 470, pp. (425-434), AISC book series of Springer., ISBN-
9789811017087(online)9789811017070(print), DOI. 10.1007/978-981-10-1708-7 ICICCD 2016 Presented Research paper entitled “Design and FPGA Implementation of 32 point FFT Processor”.

 

Advances in Intelligent Systems and Computing, Proceeding of International Conference on Intelligent Communication, Control and Devices, “Design and FPGA Implementation of 32 point FFT Processor”, International Conference on Intelligent Communication, Control and
Devices(ICICCD 2016), AISC book series of Springer, Paper Id-049, Springer conference Ref . No. 45700,vol. 479, pp. (285-292) AISC book series of Springer., SBN- 9789811017087(online)9789811017070(print) DOI. 10.1007/978-981-10-1708-7.

 

WCISE 2019, presented a Research paper entitled “Design and FPGA Implementation of LDPC Decoder for communication system using VHDL”.